Output matched ldmos power transistor device

Abstract

An output-matched LDMOS RF power transistor device includes a semiconductor die having a plurality of interdigitated electrodes formed thereon, the electrodes each having respective input terminals and output terminals. An input lead is coupled to a first terminal of an input matching capacitor by a first plurality of conductors (e.g., bond wires), with a second terminal of the matching capacitor coupled to a ground. The first terminal of the matching capacitor is also coupled to the electrode input terminals by a second plurality of conductors. A conductive island isolated from the ground is coupled to the electrode output terminals by a third plurality of conductors. Output matching of the device is provided by a shunt inductance formed by a fourth plurality of conductors, which couple a first terminal of an output blocking capacitor the conductive island, with a second terminal of the blocking capacitor coupled to the ground. An output lead is coupled to the conductive island by a fifth plurality of conductors. In particular, the conductive island is disposed adjacent the semiconductor die, and the output blocking capacitor is disposed between the conductive island and output lead, such that transmission inductance through the respective third and fourth pluralities of conductors coupling the electrode output terminals to the blocking capacitor is sufficiently small to allow for output impedance matching of the transistor device at relatively high operating frequencies.