The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2001

Filed:

Mar. 24, 1999
Applicant:
Inventor:

Masakazu Amanai, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 ;
U.S. Cl.
CPC ...
H03L 5/00 ;
Abstract

A semiconductor device comprises a level shifting circuit that can be achieved without using an extra charge pump and using low voltage transistors. The level shifting circuit,controls the on/off state of a transfer gate, which is an n-channel transistor N,. The level shifting circuit,has a NAND gate,to which the voltage mode selection signal HVON and input signal IN are given; the p-channel transistor P,, the n-channel transistor N,, and the n-channel transistor N,series connected between the NAND gate,output and the −9V charge pump output Vncp; a NAND gate,to which the voltage mode selection signal HVON is input, and input signal IN is input through inverter,; and the p-channel transistor P,, the n-channel transistor N,, and the n-channel transistor N,series connected between the NAND gate,output and the charge pump output Vncp.


Find Patent Forward Citations

Amanai, Masakazu. (2001). Level shifting circuit (U.S. Patent No. 6177824). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6177824

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…