The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2001

Filed:

Sep. 03, 1998
Applicant:
Inventor:

Clemenz L. Portmann, Cupertino, CA (US);

Assignee:

Rambus Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/017 ; H03K 5/04 ; H03K 7/08 ;
U.S. Cl.
CPC ...
H03K 3/017 ; H03K 5/04 ; H03K 7/08 ;
Abstract

A duty cycle correcting amplifier includes a first differential transistor pair with a pair of input nodes for receiving a differential input signal to be amplified. The first differential transistor pair has a first common node and a first pair of output nodes carrying differential output signals. A first current source is connected between the first common node and a first supply voltage. A second differential transistor pair has a pair of input nodes for receiving differential error input signals. The second differential transistor pair has a second common node and a second pair of output nodes coupled to the first pair of output nodes. The second differential transistor pair alters the common mode levels of each of the first pair of output nodes based on the differential error input signals to affect the duty cycle of the differential output signals. A second current source is connected between the second common node and the first supply voltage. A load circuit is connected between the first pair of output nodes and a second supply voltage. The load circuit provides a high impedance load between each node of the first pair of output nodes and a low impedance between each node of the first pair of output nodes and the second supply voltage. Capacitive circuitry is connected to each node of the first pair of output nodes. A converting amplifier has a pair of inputs for receiving the differential output signals. The converting amplifier amplifies and converts the differential output signals to a single ended signal constituting the output of the duty cycle correcting amplifier.


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