The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2000

Filed:

Dec. 18, 1997
Applicant:
Inventors:

Philip Simmons, San Jose, CA (US);

Bahadir Erimli, Mountain View, CA (US);

Jinqlih Sang, Fremont, CA (US);

Peter Ka-Fai Chow, San Jose, CA (US);

Ian Crayford, San Jose, CA (US);

Jayant Kadambi, Milpitas, CA (US);

Denise Kerstein, Mountain View, CA (US);

Thomas Jefferson Runaldue, San Jose, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
370422 ; 370412 ;
Abstract

A network having a shared memory architecture for storing data frames has a set of programmable thresholds that specify when flow control should be initiated on full-duplex network ports. The network switch includes a queue for storing free frame pointers that specify available memory locations in an external memory for storing data frames received from a network station. The network switch takes a frame pointer from a free buffer queue for each received data frame, and stores the received data frame in the location in external memory specified by the frame pointer while a decision making engine within the switch determines the appropriate destination ports. Flow control is initiated based on the number of available frame pointers by transmitting a PAUSE frame having a selected PAUSE interval to a transmitting network station. Specifically, a full-duplex port will output a PAUSE frame having a short, medium, or long programmed pause interval if the free buffer pool of available frame pointers falls below a high, medium, or low programmable threshold, respectively. The switch thus provides flexibility in generating variable-length PAUSE control frames to minimize wasting network bandwidth.


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