The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2000

Filed:

Dec. 24, 1998
Applicant:
Inventors:

Akira Takashima, Kawasaki, JP;

Hidehiko Akasaki, Kawasaki, JP;

Haruo Kojima, Kawasaki, JP;

Fumihiko Taniguchi, Kawasaki, JP;

Kazunari Kosakai, Kawasaki, JP;

Koji Honna, Aizuwakamatsu, JP;

Toshihisa Higashiyama, Kasugai, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257702 ; 257787 ; 257788 ; 257794 ; 257693 ; 257783 ; 257778 ;
Abstract

The semiconductor device includes a semiconductor chip, an FPC tape for mounting the semiconductor chip thereto, a mold resin for protecting the semiconductor chip, and metal balls provided on the FPC tape for connecting the semiconductor chip to a circuit board. The mold resin has the glass transition temperature not lower than 200.degree. C., the coefficient of linear expansion in the range from 13 to 18 ppm/.degree. C., and Young's modulus in the range from 1500 to 3000 kg/mm.sup.2, whereby warpage of the semiconductor device is mitigated. The semiconductor device can also include a buffer layer. The semiconductor device can be manufactured by collectively molding a plurality of semiconductor chips mounted to the FPC tape and by cutting the molded article into individual semiconductor packages.


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