The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2000
Filed:
Dec. 16, 1998
Rodney C Ow, Cupertino, CA (US);
Karl Mathia, Mountain View, CA (US);
PRI Automation, Inc., Billerica, MA (US);
Abstract
A wafer carrier adapter for use with a 200 millimeter wafer carrier and a pod door opener to a front end of a semiconductor processing environment. The 200 millimeter wafer carrier has a bottom surface and is provided with a plurality of recesses extending through the bottom surface in a predetermined configuration and a front opening for accessing silicon wafers in the wafer carrier. The pod door opener has a platform with a kinematic coupling which includes a plurality of pins extending upwardly in a predetermined pattern from the platform for aligning and supporting 300 millimeter wafer carriers relative to a port in the pod door opener. The wafer carrier adapter comprises a support structure having top and bottom surfaces. The support structure is provided with a plurality of recesses extending through the bottom surface adapted to receive the plurality of pins. The plurality of recesses of the support structure correspond in number to the plurality of pins and are arranged in a pattern corresponding to the predetermined pattern of pins for precisely aligning the support structure relative to the plurality of pins. The top surface has a plurality of protuberances adapted for disposition in the plurality of recesses of the 200 millimeter wafer carrier. The plurality of protuberances are arranged in a configuration relative to the plurality of recesses of the 200 millimeter wafer carrier for precisely aligning the 200 millimeter wafer carrier relative to the plurality of pins so that the front opening of the 200 millimeter wafer carrier faces the port.