The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 19, 2000
Filed:
Feb. 05, 1997
Yoshinori Okumura, Tokyo, JP;
Masayoshi Shirahata, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
Provided are a semiconductor device which can prevent occurrence of inconvenience caused by overetching resulting from difference between depths of contact holes simultaneously formed in a memory cell part and a peripheral circuit part and inconvenience resulting from extreme increase of an aspect ratio of the contact holes, and a method of fabricating the same. An aluminum wire (22) provided on an interlayer insulating film (20) of a peripheral circuit part is electrically connected with semiconductor diffusion regions, i.e., N.sup.+ -type source/drain regions (91, 92) (first semiconductor regions) and P.sup.+ -type source/drain regions (81, 82) (second semiconductor regions) by a bit line contact hole (12) formed through the interlayer insulating film (11) to have a buried layer (25) therein and an aluminum wire contact hole (21B) formed through other interlayer insulating films (14, 20) to have a buried layer (27) therein.