Methods for shallow trench isolation

Abstract

A method for forming self-rounded shallow trench isolation is described. A pad oxide layer is provided over the surface of a semiconductor substrate. A nitride layer is then deposited overlying the pad oxide layer. Isolation trenches are then etched through the nitride and pad oxide layers into the semiconductor substrate. A layer of oxide is then deposited over the said nitride layer and within the isolation trenches. The oxide layer is then polished away through chemical and mechanical polishing wherein the substrate is planarized. The nitride layer is then etched away using a special dry-etch recipe that has a higher etching rate for silicon nitride than oxide. The dry-etch recipe also has a very low etching rate for the silicon substrate. This results in the removal of the nitride layer, rounding the shoulders of the trench and leaving the substrate unaffected. The fabrication of the integrated circuit device is completed.