The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2000

Filed:

Mar. 07, 1997
Applicant:
Inventors:

Robert N Murdoch, Sacramento, CA (US);

Michael W Williams, Citrus Heights, CA (US);

Kuljit Bains, Folsom, CA (US);

Narendra Khandekar, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
711211 ; 711220 ;
Abstract

A method and apparatus for accessing a memory resource, such as an array of DRAM modules, is described. The methodology commences with the receipt of a memory address during a memory access cycle. A row address is then generated by selecting predetermined bits of the memory address as the row address. Concurrently with the generation of the row address, a determination is made as to the configuration of a memory device within the memory resource and targeted by the memory address. Thereafter, a column address is generated by selecting bits of the memory address as the column address based on the configuration of the targeted memory device. The time required for the determination of the configuration of the targeted memory device is thus absorbed within the time expended generating the row address.


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