The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 2000
Filed:
Feb. 01, 1999
Yen-Lin Ding, Hsinchu, TW;
Gary Hong, Hsin-Chu, TW;
United Semiconductor Corp., Hsinchu, TW;
Abstract
A method for fabricating a flash memory is provided. The method contains sequentially forming a tunneling oxide layer, a polysilicon layer, and a silicon nitride layer on a semiconductor substrate. Patterning the silicon nitride layer, polysilicon layer, the tunneling oxide layer, and the substrate forms a trench in the substrate. A shallow trench isolation (STI) structure is formed to fill the trench up the silicon nitride layer. The silicon nitride layer is removed to expose the polysilicon layer and a portion of each sidewall of the STI structure. A polysilicon spacer is formed on each exposed sidewall of the STI structure. An upper portion of the STI structure is removed so as to expose a portion of each sidewall of the polysilicon layer. The polysilicon layer serves as a floating gate. A conformal dielectric layer and a top polysilicon layer are formed over the substrate. The top polysilicon layer, the dielectric layer, and the polysilicon layer are patterned to form a strip control gate, which covers the floating gate, that is a remaining portion of the polysilicon layer on the tunneling oxide layer.