The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2000
Filed:
Sep. 04, 1998
Kye-Nam Lee, Cheongju, KR;
Jeong-Hwan Son, Daejon, KR;
Hyundai Electronics Industries Co., Ltd., Kyounki-do, KR;
Abstract
A fabrication method for a MOSFET device including the steps of forming a first insulating film on a semiconductor substrate wherein an active region and an isolated region are defined, forming a channel ion region by implanting impurity ions into the active region of the semiconductor substrate, forming a first conductive film pattern on a portion of the semiconductor substrate which corresponds to the channel ion region, forming a channel region having lower concentration than the channel ion region by implanting impurity ions in a different type from the ions in the channel ion region into a center portion of the channel ion region through the first conductive film pattern, forming a second conductive film pattern on the first conductive film pattern, forming an impurity region of low concentration in the semiconductor substrate with the first and second conductive film patterns as a mask, forming a sidewall spacer at both sides of the first and second conductive film patterns, and forming an impurity region of high concentration in the semiconductor substrate with the first and second conductive film patterns and the sidewall spacer as a mask. The present invention has advantages of improving the inferior-quality problem of semiconductor devices due to a short channel effect when a gate has a critical size and also preventing junction leakage in the junction between ion regions.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile