The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 07, 2000
Filed:
Oct. 28, 1997
Chi-Cheong Shen, Richardson, TX (US);
Donald C Abbott, Norton, MA (US);
Walter Bucksch, Freising, DE;
Marco Corsi, Plano, TX (US);
Taylor Rice Efland, Richardson, TX (US);
John P Erdeljac, Plano, TX (US);
Louis Nicholas Hutter, Richardson, TX (US);
Quang Mai, Sugarland, TX (US);
Konrad Wagensohner, Mauern, DE;
Charles Edward Williams, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An integrated circuit device (10) with a bonding surface (12) directly over its active circuitry, and a method of making such integrated circuits (FIGS. 2A 2E). To make the bonding surface (12), a wafer (20) is provided with vias (24) to its metallization layer (21) and then coated with a seed metal layer (25). A plating pattern (26) is formed on the wafer (20), exposing portions of the seed metal layer (25) and blocking the rest of the seed metal layer (25). These exposed portions are plated with successive metal layers (27, 28, 29), thereby forming a bonding surface (12) having a number of layered stacks (200) that fill the vias (24). The plating pattern and the nonplated portions of the seed metal layer (25) are then removed.