The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 07, 2000
Filed:
Sep. 05, 1997
Yutaka Higashiguchi, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A ball grid array package includes a package board having a bottom surface, a top surface, and peripheral side surfaces, the bottom surface having solder ball pads provided thereon, the top surface having wire bonding pads provided thereon. A semiconductor chip is contained on the package board and electrically connected to the wire bonding pads. Solder balls are arrayed in a grid formation on the bottom surface of the package board and respectively soldered to the solder ball pads of the package board. Electrodes are provided on the peripheral side surfaces of the package board, each electrode having a first portion provided on one of the peripheral side surfaces, a second portion provided on the top surface and a third portion provided on the bottom surface. Wiring patterns are provided between the bottom surface and the top surface of the package board, electrically connecting the wire bonding pads with the second portions of the electrodes, and electrically connecting the solder ball pads with the third portions of the electrodes. The semiconductor chip is electrically connected to the solder ball pads through the electrodes and the wiring patterns.