The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2000

Filed:

Jan. 14, 1998
Applicant:
Inventor:

Rajesh Raina, Austin, TX (US);

Assignee:

Motorola Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
714 37 ; 714 49 ; 714 39 ; 714 25 ; 714 31 ; 714724 ;
Abstract

A method of testing a multi-core processor that includes the steps of receiving a plurality of input signals from a plurality of processor cores (100), and producing an output signal corresponding to a disable state when at least two of the plurality of input signals represent a different logic value (106). A testing device (12) includes a multiplexer (40) responsive to a plurality of input signals (24, 26, 28, 30) from a plurality of processor cores (14, 16, 18, 20), and an output driver (48) responsive to the multiplexer (40). The output driver (48) produces an output signal (62) corresponding to a disable state when at least two of the plurality of input signals (24, 26, 28, 30) represent a different logic value.


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