Near complete charge transfer device

Abstract

A charge transfer structure (30) includes a substrate comprised of semiconductor material and, coupled to a surface of the substrate, a plurality of serially coupled devices each having a gate terminal. The plurality of serially coupled devices include a first single port device (D1) defining a first primary charge storage well, a second single port device (D3) defining a second primary charge storage well, a first two port device (D2) defining a first transfer device, a second two port device (D4) defining a second transfer device, and two instances of a third two port device each defining a cascode device (CD). The ports of these devices are serially coupled together in an order given by D1, D2, CD, D3, D4, CD for transferring charge between the first and second primary charge storage wells. Charge is inserted into and withdrawn from each of the first and second primary charge storage wells through a single diffusion that functions as both an input port and an output port. A clock signal (P1) applied to the gate of D1 and a clock signal (P3) applied to the gate of D3 are each predetermined to deplete an underlying surface region of the substrate for forming the first primary charge storage well and the second primary charge storage well, respectively, without requiring the use of diffusion implants as in conventional bucket brigade devices.