The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2000

Filed:

May. 10, 1999
Applicant:
Inventor:

Ching-Fu Lin, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438694 ; 438706 ;
Abstract

A method for forming a self-aligned contact structure is disclosed based on an HDP-CVD (High-Density Plasma-Chemical Vapor Deposition) process. Initially, after a polysilicon layer and a metal layer are deposited and patterned on a wafer to fabricate a gate stack, an HDP-CVD process is employed to form a deposition layer to cover the patterned layers and wafer. A building of sharp ridges occurs over the gate stack. Next, a spacer deposition layer is then conformally deposited to cover the HDP-CVD deposition layer. An anisotropically etch process is then performed to etch the spacer deposition layer, wherein at least portions of the spacer deposition layer still covers top of the gate stack. Another anisotropically etch process is then performed to form the required contacts on the wafer. Because the HDP-CVD deposition layer on the gate structure is thick enough to protect the gate stack from etching, it is unnecessary to form the cap layer as conventionally.


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