Gate conductor formed within a trench bounded by slanted sidewalls

Abstract

A process is provided for forming a gate conductor within a trench having opposed sidewalls which approach each other as they pass from the upper surface of a semiconductor substrate to the floor of the trench. According to an embodiment, an opening is formed through a masking layer residing upon the substrate to expose the portion of the substrate to be etched during trench formation. The opening is created using optical lithography and an etch technique. As such, the minimum width of the opening is limited in size. Once the trench has been etched in the substrate, dielectric sidewall spacers may be formed upon the sidewalls of the trench and the lateral boundaries of the masking layer. A gate conductor is subsequently formed between the sidewall spacers. The lateral width of the resulting gate conductor is thus dictated by the distance between the sidewall spacers, and hence by the thickness of the spacer material deposited upon the sidewalls of the trench. The spacers may be subsequently removed, and a relatively thick oxide layer may be formed upon the slanted trench sidewalls. The nitride layer may be removed, and dopant species may be implanted into the substrate exclusive of underneath the gate conductor. In this manner, LDD areas are formed proximate the trench sidewalls while source and drain regions are formed proximate the horizontal surface of the substrate.