Method for identifying long paths in integrated circuits

Abstract

A system and method for identifying long paths in an integrated circuit are described. An integrated circuit chip is subjected to input test signals of progressively shorter cycle time until the chip fails to produce a correct output. The cycle time of the signal resulting in the failure of the chip is defined as T. A signal having cycle time T'=T+.DELTA.T is then applied to the integrated circuit, where the signal of cycle time T' is known to result in proper operation of the chip. The chip is then observed for switching activity during the period .DELTA.T which occurs beginning at a time T measured from the beginning of the second signal of duration T' until the end of the signal of duration T'. The location of the switching activity is used to identify the path or paths of the circuit that resulted in failure of the chip. In a preferred embodiment of the invention, the switching activity is detected using an optical measurement system capable of detecting light generated by transistor switching activity.