High density plasma (hdp) etch method for suppressing micro-loading

Abstract

A method for forming a patterned polysilicon layer within a microelectronics fabrication. There is first provided a substrate layer employed within a microelectronics fabrication. There is then formed upon the substrate layer a blanket polysilicon layer. There is then formed upon the blanket polysilicon layer a blanket organic polymer layer. There is then formed upon the blanket organic polymer layer a patterned photoresist layer, where the patterned photoresist layer has a high areal density region and a low areal density region. There is then etched through a first plasma etch method while employing the patterned photoresist layer as an etch mask layer the blanket organic polymer layer to form a patterned organic polymer layer while reaching the blanket polysilicon layer. The patterned organic polymer layer has a high areal density region corresponding with the high areal density region of the patterned photoresist layer and a low areal density region corresponding with the low areal density region of the patterned photoresist layer. The blanket polysilicon layer also has formed thereupon an organic polymer residue layer within portions of the low areal density region of the patterned organic polymer layer. The first plasma etch method employs a first etchant gas composition comprising an oxygen containing species, a nitrogen containing species and a bromine containing species. There is then etched through a second plasma etch method while employing at least the patterned organic polymer layer as an etch mask layer the blanket polysilicon layer to form the patterned polysilicon layer, while suppressing a micro-loading effect.