Method and apparatus for loading directly onto bit lines in a dynamic

Abstract

A device for directly loading data onto bit lines of DRAMs. The device eliminates the need for performing a read cycle prior to a write cycle by bypassing the sense amplifiers of the DRAM. An I/O data line is connected to a bit line by a first transmission gate. A second transmission gate is electrically connected between the first transmission gate and the sense amplifier. A voltage level representing a data bit is loaded directly onto a bit line by turning off the second transmission gate to isolate the sense amplifier from the bit line and turning on the first transmission gate to connect the data line to the bit line. The voltage level on the bit line is then stored in a memory cell connected to the bit line.