The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2000

Filed:

Sep. 17, 1997
Applicant:
Inventors:

Jonathan F Churchill, Reading, GB;

Neil P Raftery, Guildford, GB;

Colin J Hendry, South Maidenhead, GB;

Jeyakumar Shanmugam, San Jose, CA (US);

Mark A Finn, Mountain View, CA (US);

Thomas M Surrette, Saratoga, CA (US);

Cathal G Phelan, Mountain View, CA (US);

Ashish Pancholy, Milpitas, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
714726 ;
Abstract

A circuit for generating a pulse including a scan register having a first scan bit; first logic device receiving a first signal and generating a second signal; and a programmable delay circuit coupled to the scan register and the first logic device. The programmable delay circuit receives the second signal and generates a delayed second signal after a programmable period of time. The programmable period of time is determined by the first scan bit. The circuit also includes a logic circuit that recevies the second signal and the delayed second signal. The logic circuiit outputs the pulse having a pulse width proportional to the programmable period of time.


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