The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2000
Filed:
Mar. 18, 1998
Shinya Sato, Gyoda, JP;
Kenichi Fujisaki, Gyoda, JP;
Advantest Corporation, Tokyo, JP;
Abstract
A semiconductor memory testing apparatus is provided which is capable of storing failure data of many semiconductor memories under test by a small memory capacity. A group of n input terminals IN.sub.1 -IN.sub.n are provided for each of m failure analysis memory units 13.sub.1 -13.sub.m, n being equal to the number of ways n of an interleave operation, and in the low rate test mode, low rate failure data LFAL.sub.1 -LFAL.sub.n are inputted to all the corresponding input terminals IN.sub.1 -IN.sub.n, respectively. Moreover, a plurality of failure format parts FLFO.sub.1 -FLFO.sub.n are provided for the memory control part MCON of each of the m failure analysis memory units, n being equal to the number of ways n of an interleave operation, and low rate failure data LFAL.sub.1 -LFAL.sub.n are stored in n banks BNC#1-BNC#n provided for each memory block MBLK through these n failure format parts FLFO.sub.1 -FLFO.sub.n, respectively.