The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2000

Filed:

Jan. 16, 1997
Applicant:
Inventors:

Takashi Okada, Kawasaki, JP;

Naohiko Hirano, Kawasaki, JP;

Hiroshi Tazawa, Yokohama, JP;

Eiichi Hosomi, Kawasaki, JP;

Chiaki Takubo, Tokyo, JP;

Kazuhide Doi, Kawasaki, JP;

Yoichi Hiruta, Kashiwa, JP;

Koji Shibasaki, Kawasaki, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257737 ; 257738 ; 257784 ; 257758 ; 257700 ; 257751 ; 257762 ; 257766 ; 257772 ;
Abstract

A first insulating film is formed on an integrated circuit chip on which an I/O pad is formed. A first opening portion is formed above the I/O pad. A conductive layer and a barrier metal layer which are electrically connected to the I/O pad through the first opening portion are stacked on the first insulating film. The conductive layer and the barrier metal layer are patterned by a single mask. A second insulating film is formed on the resultant structure. A second opening portion is formed in the second insulating film at a position different from that of the first opening portion. A solder bump or metal pad is formed on the barrier metal layer in the second opening portion. The position of the solder bump or metal pad is defined by the second opening portion.


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