The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2000
Filed:
May. 07, 1998
Applicant:
Inventor:
Keh-Ching Huang, Hsinchu, TW;
Assignee:
United Microelectronics Corp., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438238 ; 438253 ; 438649 ;
Abstract
A method of fabricating an interpoly dielectric layer of an embedded DRAM wherein a substrate having a logic FET is provided and the logic FET has a source/drain region where a titanium suicide layer is formed thereon. An oxide layer is formed on the substrate and a silicion nitride layer is formed by PECVD on the oxide layer. The thermal stability can be improved because the formation of the compressive silicon nitride layer and the oxide layer prevents junction leakage, which is produced from the embedded DRAM.