The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2000
Filed:
Jan. 04, 1999
Applicant:
Inventors:
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
326115 ; 326115 ; 326112 ; 326121 ; 326119 ; 326 83 ; 327 77 ; 327534 ;
Abstract
A current mode logic circuit has a first and second NMOS transistors N1 and N2, an input terminal IN connected to both gates of the first and second NMOS transistors N1 and N2 to input data, a reference voltage input terminal REF, an output terminal OUT connected to a drain of the first NMOS transistor N1, and a current power source I connected both sources of the first and second NMOS transistors N1 and N2. Body terminals of the first and second NMOS transistors N1 and N2 are connected to the input terminal IN and the reference terminal REF, respectively so that the body voltage of each of the first and second NMOS transistors N1 and N2 is controlled.