The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2000

Filed:

May. 27, 1999
Applicant:
Inventors:

Sherman Lee, Campbell, CA (US);

Adriana Chiocchi, San Jose, CA (US);

Manuel Hernandez, San Francisco, CA (US);

Martha Amram, Palo Alto, CA (US);

Robert Pindyck, Newton, MA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
716-1 ; 716-4 ; 716 10 ;
Abstract

According to the invention, a method for valuing the contribution of IP Blocks into integrated circuit (IC) designs includes implementing a novel concept for valuing technical and economic factors. Based upon such factors, users can more reliably value, select and use IP Blocks for their IC design that furthers their objectives. In an embodiment according to the present invention, a method for determining a group of IP Blocks from a plurality of IP Blocks to incorporate into a circuit design includes the steps of determining a circuit architecture to be implemented by the circuit design, and determining a valuation for implementing the circuit architecture.


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