Sram having p-channel tft as load element with less series-connected

Abstract

In an SRAM having P-channel thin film transistors formed on N-channel drive MOS transistors each of which is composed of a first gate electrode, a first drain layer and a first source layer, N-channel transfer MOS transistors each of which is composed of a second gate electrode, first and second diffusion layers, the MOS transistors are formed on a substrate. A first insulating film is formed on the driver and transfer MOS transistors. On the first insulating film, the p-channel thin film transistors are formed, each of which is composed of a third gate electrode, a second source layer functioning a power supply line pattern, a second drain layer and a gate insulator. Also, at the same time, there are formed another power supply line pattern to be connected to a second source layer of another p-channel thin film transistor, and a wiring layer to be connected to a third gate electrode of the other p-channel thin film transistor. A second insulating film including the gate insulator is formed on the load thin film transistor and the first insulating film. Subsequently, a contact is formed for connecting the wiring layer and the second drain layer of the thin film transistor to the first gate electrode of the driver transistor and the first diffusion layer of the transfer transistor and then a third insulating film is formed on the second insulating film. Then, a bit line on the third insulating film and a bit contact for connecting the bit line to the second diffusion layer.