High voltage mos device having an extended drain region with different

Abstract

A high voltage MOS device includes a P-type substrate having an N-type buried layer formed therein. An N-type epitaxial layer overlies the substrate and a P-type well is formed in the epitaxial layer. A source region is formed in the well such that the source region is directly in contact with the well. No intermediate layer is disposed between the source region and the well. A drain region includes an extended drain region. The extended drain region, which is formed within and in contact with the well, comprises different dopant species and has a maximum dopant concentration of 3.5.times.10.sup.17 cm.sup.-3. A heavily doped main drain region is formed within and in contact with the extended drain region. The source region and extended drain region define a channel region therebetween in the well. An insulator is on a surface of the well over the channel region. A gate is over the insulator.