The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2000
Filed:
Dec. 17, 1996
Brian H Floyd, Sunnyvale, CA (US);
Chin H Ho, Sunnyvale, CA (US);
Mike F Chang, Cupertino, CA (US);
Min Juang, Milpitas, CA (US);
Brian Cheung, San Jose, CA (US);
Karen Lee, San Jose, CA (US);
Siliconix Incorporated, Santa Clara, CA (US);
Abstract
In the present method, a semiconductor substrate is provided with an epitaxial layer thereon. A source/drain region is provided in a portion of the epitaxial layer, and a plurality of trenches are etched in the epitaxial layer and extend into the substrate, to define a plurality of mesas. An oxide layer of generally uniform thickness is provided over the mesas and in the trenches, and a polysilicon layer is provided over the oxide layer and is etched so that the oxide layer overlying the mesas is exposed, and the top surface of the polysilicon within the trenches is below the level of the tops of the mesas. A layer of spin-on-glass (SOG) is provided, and the SOG layer and oxide layer are etched substantially to the level of the tops of the mesas, to expose the tops of the mesas and to leave the portions of the SOG over the respective polysilicon portions in the trenches substantially coplaner with the tops of the mesas. A conductive layer is provided over the remaining portions of the SOG layer and the tops of the mesas.