The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2000
Filed:
Sep. 02, 1998
Dale A Potter, Beaverton, OR (US);
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Abstract
An improved line driver is disclosed. In one embodiment, the line driver has three inverters and a pass gate. The first inverter has a first input terminal connected directly to the input line of the line driver. The first inverter also has an output terminal coupled to a first output line of the line driver. The second inverter has an output node coupled to a second output line of the line driver. The third inverter has a first input terminal connected directly to the input line of the line driver and an output terminal coupled to the input node of the second inverter. The pass gate has a second input terminal coupled to the input line of the line driver and an output terminal coupled to both the second input terminal of the first inverter and the second input terminal of the third inverter. The pass gate receives an enable signal at a first input terminal and provides a conduction path between the input line of the line driver and the output terminal of the pass gate in response to the enable signal. The first and third inverters each invert the input signal to generate an output signal when the pass gate passes the input signal through. The second inverter inverts the output signal of the third inverter again to generate the direct output signal of the line driver. The line driver has a low parasitic capacitance connected to the pass gate, thereby reducing the line driver signal switching delay.