The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2000

Filed:

May. 15, 1997
Applicant:
Inventor:

Yuukoh Katoh, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257295 ; 257 33 ; 257 35 ; 257190 ; 365145 ;
Abstract

A semiconductor device is provided, which is readily and correctly designed even when the semiconductor device is further miniaturized. This device includes a semiconductor substrate, a source region and a drain region formed to be apart from each other in the substrate, a gate insulator formed on a main surface of the substrate, and a gate electrode formed on the gate insulator. The gate insulator includes a ferroelectric region and a dielectric region located in a same level as that of the ferroelectric region. The ferroelectric region is contacted with the main surface of the substrate and the gate electrode. The dielectric region is contacted with the main surface of the substrate and the ferroelectric region. The whole bottom of the ferroelectric region is contacted with the main surface of the substrate in such a way that no overlap exists between the ferroelectric region and the dielectric region.


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