The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2000
Filed:
Oct. 27, 1998
Dong Kyun Sohn, Daejeon, KR;
Jeong Soo Byun, Cheongju, KR;
LG Semicon Co., Ltd., Chungcheongbuk-do, KR;
Abstract
The present invention relates to forming epitaxial Co self-align silicide for a semiconductor device. An epitaxial Co self-align suicide layer for a semiconductor device is formed by forming a buffer layer on a silicon substrate, depositing cobalt thereon and applying an annealing process thereto to restrain silicon and cobalt from radically reacting on each other when applying the annealing process after depositing cobalt on the silicon substrate. The buffer layer is formed by performing a surface treatment using CHF.sub.3 or O.sub.2 onto the silicon substrate, applying an ion implantation using carbon, fluorine or oxygen to the silicon substrate, or exposing the silicon substrate to oxygen plasma. The present invention has an effect of forming shallow junction for a scaling down process to improve the integration of the semiconductor device.