The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2000

Filed:

Mar. 19, 1998
Applicant:
Inventors:

Donald A Priore, Maynard, MA (US);

Dilip K Bhavsar, Shrewsbury, MA (US);

Tina P Zou, Hudson, MA (US);

Assignee:

Digital Equipment Corporation, Houston, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G11C / ; H03M / ;
U.S. Cl.
CPC ...
714710 ; 714805 ; 714806 ;
Abstract

A technique for encoding failing bit addresses in a memory array with redundant portions such as column slices. The address or other identification of a column slice or other portion of a memory array is identified to test logic using a wired-OR bus configuration. The technique assigns a code consisting of predetermined number of asserted bits to each portion of the memory. If a failure condition is detected, the code associated with that portion is asserted onto the bus. Because the code for each memory portion always has a given number of asserted bits, a multi-bit failure situation can be distinguished from a single bit failure situation by counting the number of bits asserted.


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