The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2000

Filed:

May. 28, 1998
Applicant:
Inventors:

Glen B Alers, Santa Cruz, CA (US);

Robert McLemore Fleming, Chatham, NJ (US);

Lynn Frances Schneemeyer, Westfield, NJ (US);

Robert Bruce Van Dover, Maplewood, NJ (US);

Assignee:

Lucent Technologies Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438785 ; 438287 ;
Abstract

The specification describes silicon MOS devices with gate dielectrics having the composition Ta.sub.1-x Al.sub.x O.sub.y, where x is 0.03-0.7 and y is 1.5-3, Ta.sub.1-x Si.sub.x O.sub.y, where x is 0.05-0.15, and y is 1.5-3, and Ta.sub.1-x-z Al.sub.x Si.sub.z O.sub.y, where 0.7>x+z>0.05, z<0.15 and y is 1.5-3. By comparison with the standard SiO.sub.2 gate dielectric material, these materials provide improved dielectric properties and also remain essentially amorphous to high temperatures. This retards formation of SiO.sub.2 interfacial layers which otherwise dominate the gate dielectric properties and reduce the overall effectiveness of using a high dielectric material.


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