The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2000

Filed:

Apr. 14, 1998
Applicant:
Inventor:

Jhy-Jyi Sze, Tainan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438398 ; 438254 ; 438255 ;
Abstract

The method for forming a first electrodes of capacitors on a semiconductor substrate includes the steps as follows. At first, a first dielectric layer is formed. A portion of the first dielectric layer is then removed to define contact holes. A first conductive layer is formed within the contact holes and over the first dielectric layer. A second dielectric layer is formed over the first conductive layer. A portion of the second dielectric layer is removed to define the shape of the first electrodes. A second conductive layer is formed over the second dielectric layer and the first conductive layer. A first rugged silicon layer is formed over the second conductive layer. A third dielectric layer is then formed over the first rugged silicon layer. A portion of the third dielectric layer, of the first rugged silicon layer, and of the second conductive layer is removed to define capacitor area. The second dielectric layer is removed and a second rugged silicon layer is formed over the substrate. A portion of the second rugged silicon layer and a portion of the first conductive layer which are located outside the capacitor area is removed. Finally, the third dielectric layer is removed to form the first electrodes.


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