The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2000

Filed:

Jun. 12, 1998
Applicant:
Inventors:

Roman A Slizynski, Beaverton, OR (US);

Bryan J Dinteman, Canby, OR (US);

Assignee:

Credence Systems Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
3241581 ; 714724 ;
Abstract

A general purpose integrated circuit (IC) tester includes a set of channels, one for each input or output pin of an IC device under test (DUT). Each channel is programmed by a host computer to either supply a test signal to a DUT I/O pin or sample a DUT output signal appearing at the I/O pin and produce sample data representing its magnitude or logic state. The tester also includes an amorphous logic circuit (ALC) having a set of input and output terminals and a programmable logic circuit interconnecting the input and output terminals. Some of the ALC input and output terminals receive the sample data produced by each channel and other ALC terminals send control signals directly to each channel. Other ALC terminals transmit data to the host computer. When it programs the channels to perform a test, the host computer also programs the ALC to control various operations of the channels during the test, to perform a real-time analysis of the test data produced by the channels, and to communicate results of the analysis to the host.


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