The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2000

Filed:

Sep. 12, 1997
Applicant:
Inventors:

Albino Pidutti, Udine, IT;

Axel Alegre de La Soujeole, Scotts Valley, CA (US);

Elango Pakriswamy, Santa Clara, CA (US);

Assignee:

STMicroelectronics, Inc., Carrollton, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327424 ; 327110 ; 327588 ; 360 46 ; 360 68 ;
Abstract

A method and apparatus, for applying a current to a coil of a write head assembly of a disk drive, or the like, to cause the flux within the coil to rapidly reverse, has an H-bridge having two pair of two switchable transistors. Each pair of the transistors is connected between a supply voltage and a reference potential, and is adapted to be connected to the coil between the two transistors of each pair. The two transistors of the first pair may be connected to receive a control signal to turn on complementary transistors of the first and second pair of transistors to selectively control current flow in the coil in first or second directions. A reference current source supplies a reference current, and one of the transistors in each of the first and second pairs of transistors is connected when turned on to mirror the reference current to control the currents in the coil. First and second parallel transistors are connected in parallel respectively with the mirror transistors, the first and second parallel transistors being connected to be turned on respectively by the control signal and the inverted control signal concurrently with the respective mirror transistor. A pair of timing elements turn off respective ones of the parallel transistors after a predetermined time so that when the parallel transistors are turned on, the current in the coil overshoots a value established by the mirror transistors.


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