The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2000
Filed:
Dec. 05, 1997
Richard K Klein, Mountain View, CA (US);
Asim A Selcuk, Cupertino, CA (US);
Nicholas J Kepler, San Jose, CA (US);
Craig S Sander, Mountain View, CA (US);
Christopher A Spence, Sunnyvale, CA (US);
Raymond T Lee, Sunnyvale, CA (US);
John C Holst, San Jose, CA (US);
Stephen C Horne, Austin, TX (US);
Advanced Micro Devices, Sunnyvale, CA (US);
Abstract
A method and the resulting device to permit the formation of minimal insulating space between polysilicon gates by forming an insulating layer over the polysilicon gates and protecting selected ones of the gates and the insulating layer with an etch barrier so that the opening for local interconnect metallization can be misaligned and the selected gates will be protected by its etch barrier and not be exposed to the opening. Further, local interconnect conductive material can pass over a gate or unrelated resistor without shorting the gate/resistor.