The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2000

Filed:

Jan. 25, 1999
Applicant:
Inventors:

Kunio Shikata, Minoo, JP;

Masayuki Ono, Toyonaka, JP;

Masao Katooka, Kawanishi, JP;

Haruo Moriguchi, Itami, JP;

Tetsuro Ikeda, Osaka, JP;

Kenzo Danjo, Soraku-gun, JP;

Atsushi Kinoshita, Osaka, JP;

Fumi Noda, Osaka, JP;

Hideo Ishii, Minoo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B23K / ;
U.S. Cl.
CPC ...
21913033 ; 21913031 ; 21913032 ;
Abstract

A power supply apparatus for welders includes an input-side AC-to-DC converter for converting an input commercial AC voltage into a DC voltage, which is, in turn, converted to a high-frequency voltage in an inverter. The high-frequency voltage is transformed to a high-frequency voltage having a desired magnitude in a transformer. The transformed high-frequency voltage is then converted back to a DC voltage in an output-side high-frequency-to-DC converter. The DC voltage is developed between output terminals of the power supply apparatus. A current detector detects the current flowing through the output terminals and develops a detected-current representative signal. A voltage detector detects the voltage between the output terminals and develops a detected-voltage representative signal. A CPU has three control modes and controls, in a first mode, the inverter in such a manner that the current representative signal becomes equal to a reference-current representative signal. In a second mode, the CPU activates and, then, deactivates a high-frequency generator, which provides a high-frequency voltage between the output terminals, and, thereafter, performs the first mode of control. In a third control mode, the CPU controls the inverter in such a manner that the voltage representative signal becomes equal to a reference-voltage representative signal and also controls a wire feeder for feeding a wire to be connected to one of the output terminals.


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