The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2000

Filed:

May. 21, 1998
Applicant:
Inventors:

Yau-Kae Sheu, Hsinchu, TW;

Gary Hong, Hsin-Chu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438270 ;
Abstract

A method of fabricating a bit line on a semiconductor substrate is provided. First, an oxide layer is formed and patterned on the substrate. An epitaxial layer is formed on the exposed substrate after patterning the oxide layer. A first spacer and a second spacer are sequentially formed on the sidewalls of a opening of the oxide layer. A trench is formed by partially removing the epitaxial layer and the substrate. A liner oxide layer is formed in the trench after removing the second spacer. A polysilicon layer as a conductive layer is formed in the trench after removing the first spacer. Then, a step of ion implantation and an annealing step are carried out. A buried bit line is formed after etching back the polysilicon layer.


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