The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 04, 2000
Filed:
Feb. 08, 1999
Yi-Tyng Wu, Chiayi, TW;
United Microelectronics Corp., Hsin-Chu, TW;
Abstract
The present invention relates to a method of making a load resistor of a static random access memory on a dielectric layer of a semiconductor wafer. This method comprises depositing a poly-silicon layer on the dielectric layer, depositing a silicon-oxy-nitride (SiO.sub.X N.sub.Y) layer on the poly-silicon layer, performing a photolithographic process to define an area for making the load resistor, and performing an etching process to remove the silicon-oxy-nitride layer and the poly-silicon layer in all areas except for the area of the load resistor so as to form the load resistor. The poly-silicon layer of the load resistor is used as a conductive resistance layer, and the silicon-oxy-nitride layer of the load resistor is used as a radiation insulating layer for preventing radiation damages of the load resistor caused by plasma radiation in plasma processes to be performed later on.