The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 04, 2000
Filed:
Mar. 13, 1997
O Glenn Ramer, Los Angeles, CA (US);
John J Drab, Santa Barbara, CA (US);
Venita L Dyer, Sherman Oaks, CA (US);
Raytheon Company, Lexington, MA (US);
Abstract
A method of packaging hybrid wafers or die that are interconnected using soft metal bumps, such as indium, in a sealed ceramic package. The present invention passivates the hybrid die that are to be interconnected by way of the bumps, so that the metal in the bumps (indium) does not wet the surface of the hybrid die when the ceramic package is sealed at high temperature. Vias are formed in the passivated surfaces to expose underlying contact areas. Bumps are then formed on the contact areas, and the bumped and passivated hybrid die are electrically interconnected. The ceramic package containing the electrically interconnected hybrid die is processed at a temperature above the melting temperature of the bumps to attach a ceramic cover to the ceramic package. The method is performed at a temperature well in excess of the melting temperature of the bumps (.about.155.degree. Celsius for indium), typically on the order of 325.degree. Celsius. The surface tension of the indium maintains the bump structure and electrical contact between the two hybrid die. The present invention may also be employed with flip chip and multi-chip module ceramic packages.