The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2000

Filed:

Nov. 10, 1997
Applicant:
Inventors:

Richard G Yamasaki, Torrance, CA (US);

Kiyoshi Fukahori, Tokyo, JP;

Tomoaki Ohtsu, Yokohama, JP;

Assignee:

Silicon Systems, Inc., Tustin, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11B / ;
U.S. Cl.
CPC ...
360 51 ;
Abstract

The present invention prevents catastrophic failures of a write precompensation circuit from occurring without limiting the precompensation range to a small value and also extends the range of precompensation beyond limits imposed by the duty cycle of the clock signal. The present invention prevents catastrophic failure of the write precompensation circuit by ORing either the input or the output of the comparator and the opposite phase of the clock. The 180 degree delayed clock forces any transitions that would otherwise have been missed. The present invention extends the range of a write precompensation circuit by ORing the clock and the dock delayed by a time td. The extended duty cycle that results is used to generate a longer precompensation delay. A technique is also provided to maintain constant duty cycle over a broad range of data rates.


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