The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2000
Filed:
Dec. 04, 1998
Applicant:
Inventor:
David E Freker, Sacramento, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
3652385 ; 36523002 ; 36523003 ;
Abstract
The present invention is a method and apparatus for addressing a memory array. The memory array has N rows of memory devices with different page sizes. A memory address corresponding to one of the N rows of memory devices is generated. A device bank address is selected corresponding to a device size and a device page size of the one of the N rows of memory devices.
Quick Actions:
Freker, David. (2000). Optimizing page size in mixed memory array using address multiplexing (U.S. Patent No. 6041016). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6041016
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