Constant current programming waveforms for non-volatile memories

Abstract

An EEPROM MOSFET memory device with a floating gate and control gate stack above source and drain regions formed in a substrate self-aligned with the stack. There is a means for writing data to the floating gate electrode by applying an upwardly stepwise increasing control gate voltage V.sub.CG1 waveform applied to the control gate of the EEPROM device. The waveform is a voltage ramp providing a substantially constant tunneling current into the floating gate electrode which is approximately constant with respect to time so programming speed and the number of write/erase cycles is increased. The means for threshold voltage testing compares the voltage of the drain electrode to a reference potential. The ramped pulse output is supplied to the control gate electrode by producing a sequence of increasingly higher counts to a decoder which provides sequential switching of successively higher voltage pulses from a voltage divider, and there is means for providing ramping programming voltages to the successively higher voltage pulses.