The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2000

Filed:

Aug. 06, 1998
Applicant:
Inventors:

Seiichirou Shirai, Tokyo, JP;

Toshihiko Onozuka, Tokyo, JP;

Takayuki Noishiki, Tokyo, JP;

Satoshi Sakai, Tokyo, JP;

Katsuhiro Sasajima, Tokyo, JP;

Eiji Toyoda, Osaka, JP;

Makoto Namikawa, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03C / ;
U.S. Cl.
CPC ...
430258 ; 430329 ; 438747 ; 438725 ; 134-13 ; 216 40 ;
Abstract

The present invention provides a process for the removal of a resist layer formed on a semiconductor substrate, which enables easy removal of a resist layer without causing any damage on a gate oxide layer, and an apparatus therefor. The process comprises the steps of forming a gate oxide layer on the semiconductor substrate; forming a resist layer as a resist pattern on the gate oxide layer; removing the gate oxide layer at unnecessary area utilizing the resist layer as a mask; applying a pressure-sensitive adhesive sheet to the semiconductor substrate such that the gate oxide layer left on the semiconductor substrate and the resist layer are masked, and peeling the pressure-sensitive adhesive sheet together with the resist layer off the semiconductor substrate to separate and remove the resist layer from the semiconductor substrate.


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