The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2000

Filed:

Jun. 04, 1998
Applicant:
Inventors:

Tohru Maruyama, Yokohama, JP;

Riichiro Shirota, Fujisawa, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518517 ; 36518503 ; 257288 ; 257316 ;
Abstract

In a NAND cell type of EEPROM memory which has an STI (Shallow Trench Isolation) structure and uses memory cells into which two- or more-value data can be rewritten through the use of floating channel writing techniques, a plurality of floating gate electrodes are formed above the surface of an Si substrate with a tunnel oxide interposed therebetween. Trenches are formed in portions of the surface of the Si substrate each of which is located between floating gate electrodes arranged in one direction. In each trench, a conductive material is buried to form a buried electrode which is externally impressed with a low voltage. This boots the channel potential of nonselected cells, preventing erroneous writing without increasing the cost per bit.


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