The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 2000
Filed:
Apr. 07, 1997
Applicant:
Inventors:
Stanley J Kopec, Jr, Portland, OR (US);
Cheng-Yuan Michael Wang, San Jose, CA (US);
Jerome Connelly Farmer, San Jose, CA (US);
Cyrus Y Tsui, Los Altos, CA (US);
Assignee:
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
326 39 ; 326 41 ;
Abstract
A programmable interconnect circuit includes multiple input/output cells, each corresponding to an input/output pin, and a global routing resource for routing signals received at the input pins to be output as output signals at output and bi-directional pins. The signals routed in the global routing resource can include multiplexer control signals, clock signals and output enable signals for controlling dynamic signal switching. The global routing resource allows high static routability.