The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 2000
Filed:
Mar. 11, 1998
Larry Louis Moresco, San Carlos, CA (US);
Richard L Wheeler, San Jose, CA (US);
Solomon I Beilin, San Carlos, CA (US);
David A Horine, Los Altos, CA (US);
Fujitsu Limited, , JP;
Abstract
A power distribution structure for a multichip module including, a base plate, a plurality of mesas arranged in a pattern are formed on the base plate, the mesas having electrically conductive upper surfaces which lie substantially in a single plane. A thin, conformal dielectric layer is formed over the exposed side surfaces of the mesas and the exposed surfaces of the support base and a conductive material is deposited over the dielectric material filling the area between and surrounding the mesas. The upper surfaces of the mesas and the upper surface of the conductive material surrounding the mesas lie in substantially one plane and are electrically isolated from each other by the dielectric material. A multilayered thin film structure for a multichip module may be formed over the power distribution structure and power and ground potentials supplied to microelectronic components, such as integrated circuit chips, mounted on the surface of the thin film structure using vias routed through the thin film structure.