The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2000

Filed:

Dec. 09, 1997
Applicant:
Inventor:

Wen-Lo Hsieh, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
438112 ; 438124 ; 438126 ; 438127 ; 438613 ; 438617 ;
Abstract

A semiconductor chip fabrication method, including the steps of: (a) attaching dies to a chip carrier and then bonding lead wires to the dies, (b) adhering heat-resisting plastic strips to the chip carrier and connecting them to each die at one corner for guiding a molten resin to the dies, (c) pouring a molten resin out of nozzles of a molding apparatus, permitting the molten resin to be guided by the heat-resisting plastic strips to the dies and then molded on the dies, and (d) marking the molded dies with marks and placing them with balls, and then separating the individually molded dies from one other.


Find Patent Forward Citations

Hsieh, Wen-Lo. (2000). Semiconductor chip fabrication method and apparatus therefor (U.S. Patent No. 6033934). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6033934

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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